Claiming to use 10% less power and 40% faster performance than the most recent 3 nm silicon chips from Intel, TSMC, and Samsung, researchers from Peking University in China have presented a silicon-free transistor based on two-dimensional bismuth oxyselenide using a gate-all-around (GAA) architecture.
By totally surrounding the channel with the gate, this GAAFET architecture removes leakage and enhances current control, hence advancing transistor efficiency. This will let microprocessors be developed following silicon.
Breakthrough Transistor Design
Chinese scientists at Peking University leveraged bismuth oxyselenide, a two-dimensional semiconductor, to build the new GAAFET transistor. The device wraps the gate material completely around the channel, boosting electrostatic control and reducing off-state leakage currents compared with partial-coverage FinFETs.
Early tests suggest the bismuth-based transistor sustains high on/off current ratios and robust switching behavior, crucial metrics for logic-level operations
Performance Gains vs. Silicon
In laboratory benchmarks, the silicon-free GAAFET achieved up to 40 percent higher switching speeds than Intel’s latest 3 nm transistors while consuming roughly 10 percent less power, according to the researchers.
Comparisons with TSMC and Samsung’s flagship silicon nodes yield similar advantages, positioning the new design as a potential successor for ultra-high-performance and energy-efficient applications. The 2D material’s flexibility and atomic thinness also promise improved thermal dissipation and mechanical resilience over brittle silicon channels.
Implications for the Global Chip Industry
If scalable, silicon-free transistors could upend the dominance of silicon fabs by enabling smaller feature sizes and lower leakage without the escalating complexity of extreme ultraviolet (EUV) lithography.
China’s achievement may accelerate competition among Intel, TSMC, and Samsung to explore alternative semiconductors, galvanizing investment in 2D materials research globally. By sidestepping silicon’s physical limits, this technology could extend Moore’s Law into a post-silicon era.
Challenges and Next Steps
Despite the potential, there are barriers to commercial deployment, including a lack of proof for large-scale, defect-free bismuth oxyselenide synthesis and the requirement for unique manufacturing techniques to integrate with existing CMOS infrastructures. Furthermore, the technology’s durability must be proven through long-term reliability testing in a variety of climatic conditions and high current densities.
In order to increase performance and manufacturability, researchers want to publish comprehensive fabrication processes and device measurements in Nature Materials, along with an invitation to collaborate.
